Mohammadnia, Mohammad Reza - Precision and Reliability of Application Specific Designs on FPGA...

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This thesis has been submitted to the Library for purposes of graduation, but needs to be audited for technical details related to publication in order to be approved for inclusion in the Library collection.
Term: 
Fall 2017
Degree: 
Ph.D.
Degree type: 
Thesis
Department: 
School of Engineering Science
Faculty: 
Applied Sciences
Senior supervisor: 
Lesley Shannon
Thesis title: 
Precision and Reliability of Application Specific Designs on FPGA
Given Names: 
Mohammad Reza
Surname: 
Mohammadnia
Abstract: 
Application-specific designs can use hardware, such as Field Programmable Gate Array (FPGA)s, to have complete freedom. This includes defining data types as opposed to using the predefined standard data types supported in software that are restricted by the architecture of the target processor. Moreover FPGAs are extremely popular for computationally intensive applications that use either integer or fixed-point calculations and have a limited power budget. Static Random-Access Memory (SRAM)-based FPGAs also have the potential for a high level of reliability by leveraging their ability to be reconfigured at runtime. In this thesis, we have selected two case studies for hardware acceleration: 1) a biomedical imaging system for our investigations on precision and reliability Fourier Domain Optical Coherence Tomography (FD-OCT), and 2) and a Synthetic Aperture Radar (SAR) system for our investigations on reliability. Fixed-point arithmetic provides faster and smaller hardware implementations for Digital Signal Processing (DSP) applications at the expense of accuracy. Especially, when a Fast Fourier Transform (FFT)-Inverse Fast Fourier Transform (IFFT) pair are required as part of the calculation, the error introduced into the calculations can be significant. This error mostly affects the phase information of the processing signal. Thus, for phase sensitive applications, such as FD-OCT, this degradation is unacceptable. For example, a 32-bit fixed-point implementation of FD-OCT on an FPGA could result in a 78% of error compared to double precision calculations. In order to retain the accuracy of both SAR and FD-OCT implementations, we numerically analyzed the algorithm versus fixed-point, integer and floating point numbers and introduced the adaptability of integer transforms for such applications, specially FD-OCT. Then, by using our custom designed Integer Split Radix Fast Fourier Transform (Int-SRFFT) and Integer Radix-22 FFT, we decreased the maximum peak error from 78% to less than 1 percent. Moreover, a mathematical reliability model has been developed for an on-board SAR processor that informs the appropriate techniques for increasing the reliability of the final SAR processor implementation. Various upset mitigation strategies are introduced and two customized strategies are proposed for this specific application. The proposed methods are based on truth vectoring and scheduled scrubbing that achieved an increase of robustness of the system by the factor of 3.8 and 4.8 respectively.
Keywords: 
Keywords: Application specific hardware; precision; reliability; FD-OCT; SAR; integer; realtime
Total pages: 
232